Ch 2 · 4 Processor Fundamentals · AS & A Level Computer Science 9618
Topic 2 of 2 in Hardware and Processor Fundamentals — AS & A Level Computer Science 9618 — 129 lessons.
Introduction
This lesson goes inside the processor: its registers and buses, the fetch–execute cycle written in register transfer notation, interrupts, assembly language with the instruction set used in the exam, and bit manipulation. (Syllabus topic 4: sections 4.1–4.3.)
Key ideas — 4.1 (a) The Von Neumann model
In the Von Neumann model, a single main memory holds both instructions and data, and the processor fetches and executes instructions one at a time (sequentially). This is the stored program concept: a program is stored in memory as binary instructions, alongside its data, and can be changed by loading a different program.
🧑🏫 Teacher's explanation
Imagine a chef working in a kitchen. In the old days, if you wanted to cook something different, you had to physically rebuild the kitchen tools. In the Von Neumann model, the kitchen has a single large countertop (Main Memory). On this countertop, you place both your ingredients (Data) and your recipe (Instructions). Because they sit on the same surface, the chef can read the recipe, grab an ingredient, and perform an action.
📖 Definitions
🔍 Worked example — Easy
A CPU uses a 4-bit address bus. How many unique memory locations can the CPU access?
🔍 Worked example — Standard
In a Von Neumann architecture, a program is stored starting at memory address 100_10. The first instruction is at 100_10 and is 2 bytes long. What is the address of the next instruction?
🔍 Worked example — Exam-style
A computer uses a 16-bit word size. If the CPU fetches an instruction from memory, which register holds the address of that instruction, and which register holds the instruction itself once it has been fetched from memory?
⚠️ Common errors
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🎯 Exam question
(a) State the main difference between the Von Neumann model and the Harvard architecture. [1] (b) Describe the role of the Program Counter (PC) during the fetch-execute cycle. [2] [3 marks]
Key ideas — 4.1 (b) Registers
General purpose registers hold data being processed (in the exam, the accumulator is the only one). Special purpose registers have one specific job:
🧑🏫 Teacher's explanation
Imagine a busy chef in a professional kitchen. The chef cannot cook everything at once; they need a workspace. The Accumulator is like the chef's cutting board where the current ingredients are being chopped. The Program Counter is like the chef's recipe book, pointing to the next step they need to perform. The MAR and MDR are like the chef's hands and the pantry shelf; the MAR points to exactly which shelf to look at, and the MDR is the container holding the item being moved from the shelf to the cutting board.
📖 Definitions
🔍 Worked example — Easy
A CPU is executing a program. The Program Counter (PC) currently holds the value 100_10. The next instruction is located at address 101_10. What is the value of the PC after the fetch stage of the current instruction is completed?
🔍 Worked example — Standard
A CPU performs the operation 5 + 3. The value 5 is currently in the Accumulator (ACC). The value 3 is fetched from memory into the Memory Data Register (MDR). Describe the state of the registers after the ALU completes the addition.
🔍 Worked example — Exam-style
A processor uses a 4-bit Status Register to store flags. The current flags are: Zero (Z), Carry (C), Negative (N), and Overflow (V). If an addition results in a value of 0, and a carry-out occurs, what is the binary representation of the Status Register (assuming order Z, C, N, V)?
⚠️ Common errors
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🎯 Exam question
State the values of the following registers after the instruction has been executed: (a) Program Counter (PC) (b) Accumulator (ACC) [2 marks]
Key ideas — 4.1 (c) Other components
🧑🏫 Teacher's explanation
Think of the CPU as a highly organized kitchen. The ALU is the chef performing the actual cooking (adding ingredients or deciding if something is done), while the CU is the head chef shouting orders and timing the movements to ensure everything happens in the right sequence. The System Clock is the kitchen timer that keeps everyone in sync.
📖 Definitions
🔍 Worked example — Easy
A CPU uses a 32-bit address bus. How many unique memory locations can it address?
🔍 Worked example — Standard
A system has a 4-bit data bus and an 8-bit address bus. If the CPU wants to read the value at address 1011_2, describe the direction of travel for the address and the data.
🔍 Worked example — Exam-style
A CPU's system clock operates at 3.2 GHz. How many clock cycles occur in 2 microseconds (2μ exts)?
⚠️ Common errors
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🎯 Exam question
Key ideas — 4.1 (d) Performance
🧑🏫 Teacher's explanation
Imagine a chef working in a kitchen. The processor is the chef. The clock speed is how fast the chef moves their hands; the faster they move, the more dishes they can finish, but they might get too hot and burn out. The number of cores is like having multiple chefs working at the same time; if they can split the orders, they finish much faster.
📖 Definitions
🔍 Worked example — Easy
A processor has a clock speed of 2.5 GHz. How many clock cycles occur in 2 seconds?
🔍 Worked example — Standard
A processor uses a 32-bit address bus. Calculate the maximum number of unique memory locations it can address.
🔍 Worked example — Exam-style
Compare two processors. Processor A has a clock speed of 3.0 GHz and a 64-bit data bus. Processor B has a clock speed of 4.0 GHz and a 32-bit data bus. If a task requires transferring 128 bits of data, how many cycles does Processor A need compared to Processor B?
⚠️ Common errors
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🎯 Exam question
(a) Calculate the maximum number of memory locations that can be addressed. [2] (b) Explain why increasing the data bus width would improve the performance of the system. [2] [4 marks]
Key ideas — 4.1 (e) Ports
🧑🏫 Teacher's explanation
Think of a computer as a high-tech workstation. The CPU is the brain, but the brain needs ways to talk to the outside world—like hands to pick up tools or eyes to see a screen. These 'hands' and 'eyes' are connected via ports.
📖 Definitions
🔍 Worked example — Easy
A user wants to connect a modern 4K monitor and a legacy projector that only accepts analogue signals. Identify the most appropriate port for each device.
🔍 Worked example — Standard
Compare the signal types of HDMI and VGA.
🔍 Worked example — Exam-style
A technician is connecting a USB keyboard, an HDMI monitor, and a VGA monitor. Which of these ports can supply power to the peripheral?
⚠️ Common errors
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🎯 Exam question
(a) State the most appropriate port for the high-definition monitor. [1] (b) State the most appropriate port for the legacy projector. [1] (c) Explain one difference between the signal types used by HDMI and VGA. [2] [4 marks]
Key ideas — 4.1 (f) The fetch–execute cycle and register transfer notation
Decode: the CU decodes the instruction in the CIR (opcode and operand).
🧑🏫 Teacher's explanation
Imagine a chef in a kitchen following a recipe. The recipe book is the memory. The chef's brain is the CPU. To cook, the chef first looks at the current step number (the Program Counter). They then go to that specific page in the book (the Memory Address Register) to read the instruction (the Memory Data Register). Once they read it, they understand what to do (Decode) and then perform the action, like chopping a carrot (Execute).
📖 Definitions
🔍 Worked example — Easy
A CPU is at the start of a fetch cycle. The current value in the PC is 100_10. Using register transfer notation, show the state of the PC and MAR after the first step of the fetch cycle.
🔍 Worked example — Standard
Trace the registers during a fetch cycle. Initially, PC = 50_10. The instruction at memory address 50_10 is ADD \ 10. After the fetch stage is complete (including the PC increment), what is the value in the PC and the MDR?
🔍 Worked example — Exam-style
A processor uses a 4-bit address space. The PC currently holds 1011_2. Perform the fetch cycle steps: 1. MAR arrow [PC], 2. PC arrow [PC] + 1, 3. MDR arrow [[MAR]]. If memory address 1011_2 contains 0110_2, what is the final value of the PC and the MDR in binary?
⚠️ Common errors
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🎯 Exam question
Trace the fetch stage of the cycle using register transfer notation. State the final values of the PC and the MDR in binary. [4] [4 marks]
Key ideas — 4.1 (g) Interrupts
An interrupt is a signal from a device or program requesting the processor's attention.
🧑🏫 Teacher's explanation
Imagine you are reading a textbook (the main program) and you are deeply focused on a complex math problem. Suddenly, your phone vibrates (an interrupt). You don't stop mid-sentence; you finish the current paragraph, put a bookmark in your book (saving the state), answer the text (the Interrupt Service Routine), and then use the bookmark to return exactly to where you were.
📖 Definitions
🔍 Worked example — Easy
A CPU is executing a program. A hardware interrupt is triggered by a keyboard press. List the sequence of events the CPU must perform to handle this interrupt.
🔍 Worked example — Standard
A CPU is executing a loop. An interrupt occurs. If the current Program Counter (PC) is 0x400 and the ISR is located at 0x900, what is the value of the PC immediately after the interrupt is detected and the ISR begins?
🔍 Worked example — Exam-style
A system uses a priority-based interrupt system. Task A is running. Interrupt 1 (Low Priority) and Interrupt 2 (High Priority) occur simultaneously. Describe the CPU's behavior.
⚠️ Common errors
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🎯 Exam question
(a) Describe the steps the processor must take to handle this interrupt. [4] (b) Explain why the processor does not check for the interrupt in the middle of an instruction execution. [2] [6 marks]
Key ideas — 4.2 (a) Assembly language and machine code
Machine code is binary instructions that the processor executes directly. Assembly language uses mnemonics (e.g. LDD, ADD) and symbolic addresses (labels); each assembly instruction corresponds to one machine-code instruction. An assembler translates assembly language into machine code.
🧑🏫 Teacher's explanation
Imagine you are writing a recipe for a robot. Machine code is the only thing the robot understands: a long, confusing string of 1s and 0s that represent specific electrical signals. For a human, reading 01101011 00000101 is nearly impossible. Assembly language is like writing that recipe in a simplified shorthand using words (mnemonics) like ADD or MOV. Instead of saying "Execute electrical signal 0110", you say "ADD".
📖 Definitions
🔍 Worked example — Easy
Identify the machine code instruction for the assembly instruction ADD #5 (Immediate addressing) given that the opcode for ADD is 0010 and the operand is a 4-bit binary value.
🔍 Worked example — Standard
Trace the following assembly program. Assume the accumulator (ACC) starts at 0. LDM #10 ADD #5 SUB #2
🔍 Worked example — Exam-style
A two-pass assembler is processing a program. In Pass 1, it encounters the label START:. In Pass 2, it encounters the instruction JMP START. Explain how the assembler resolves the address of START.
⚠️ Common errors
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🎯 Exam question
(a) State the main purpose of the first pass. [1] (b) Explain why a two-pass assembler is necessary rather than a single-pass assembler when labels are used. [2] [3 marks]
Key ideas — 4.2 (b) The two-pass assembler
Two passes are needed because a label may be used before it is defined (a forward reference, e.g. a jump to a later label).
🧑🏫 Teacher's explanation
Imagine you are organizing a massive scavenger hunt. You have a list of clues, but some clues say "Go to the tree," but you don't know which tree that is until you finish reading the whole list and map out all the locations. If you tried to write the final instructions in one go, you'd get stuck the moment you hit a clue pointing to a location you haven't found yet.
📖 Definitions
🔍 Worked example — Easy
A simple assembly program has the following lines:
🔍 Worked example — Standard
Given the Symbol Table { START: 100, DATA: 105 } and the instruction 'LDM DATA', what is the machine code instruction for the operand if the opcode for LDM is 0011 and the address is 4 bits?
🔍 Worked example — Exam-style
Trace the two-pass process for:
⚠️ Common errors
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🎯 Exam question
(a) Identify the label in this program. (b) Explain why a two-pass assembler is required to translate this program into machine code. [3 marks]
Key ideas — 4.2 (c) The instruction set and addressing modes
= denary number, B = binary (B01001010), & = hexadecimal (&4A).
🧑🏫 Teacher's explanation
Imagine you are playing a scavenger hunt. If the clue says "The prize is in the red box," that is immediate addressing—you have the value right there. If it says "Go to box 5," that is direct addressing—you have the location. If it says "Go to the box that contains the location of the prize," that is indirect addressing—it's a two-step process.
📖 Definitions
🔍 Worked example — Easy
Trace the following assembly code. Initial state: ACC = 0, IX = 0, Memory[100] = 45. Instruction: LDM #45 followed by LDD 100.
🔍 Worked example — Standard
Calculate the effective address and the final ACC value. Initial state: ACC = 10, IX = 5, Memory[200] = 100, Memory[100] = 50. Instructions:
🔍 Worked example — Exam-style
An assembly program is executing. Initial state: PC = 500, IX = 12, Memory[1000] = 25, Memory[1012] = 88. Instruction: LDX 1000.
⚠️ Common errors
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🎯 Exam question
Initial state: ACC = 0 IX = 10 Memory[500] = 20 Memory[510] = 45
Key ideas — 4.2 (d) Tracing a program
If address 100 holds 15 and 101 holds 27: ACC = 15, then 42; address 102 = 42.
🧑🏫 Teacher's explanation
Tracing a program is like following a recipe step-by-step to see exactly what is happening in the kitchen at every moment. You aren't just looking at the final cake; you are watching how the flour, eggs, and sugar change state as you mix them.
📖 Definitions
🔍 Worked example — Easy
Trace the following program. Initial state: Memory address 100 = 5, Memory address 101 = 12.
🔍 Worked example — Standard
Trace the following loop. Initial state: ACC = 2, COUNT = 2.
🔍 Worked example — Exam-style
Trace the following assembly program. Initial state: Memory address 200 = 10.
⚠️ Common errors
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🎯 Exam question
LDM #10 ADD 100 SUB #3 STO 101
Key ideas — 4.3 Bit manipulation
Examples on 10110010: LSL #1 → 01100100; LSR #1 → 01011001; arithmetic right 1 → 11011001; cyclic left 1 → 01100101.
🧑🏫 Teacher's explanation
Imagine a row of eight light switches. Bit manipulation is like having a specialized toolset to interact with these switches without affecting the others. Instead of flipping the whole row, you use 'masks'—special patterns of bits—to target exactly one switch at a time.
📖 Definitions
🔍 Worked example — Easy
Perform a logical left shift (LSL) on the binary byte 00001101_2 by 2 positions.
🔍 Worked example — Standard
A status register contains 10110110_2. Use a bitwise AND operation with the mask 00000100_2 to test if the 3rd bit (value 2^2) is set.
🔍 Worked example — Exam-style
An 8-bit register holds the value 11110000_2. Perform an arithmetic right shift (ASR) by 2 positions. Show the result in binary.
⚠️ Common errors
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🎯 Exam question
Worked example
Using the instruction set, write assembly code to load the value at address 50, add 7, and store the result at address 51. Identify the addressing modes used.
🔍 Worked example — Easy
Given the instruction set: \texttt{LDD <addr>} (Load from address), \texttt{ADD <addr/\#val>} (Add value/content), and \texttt{STO <addr>} (Store to address). Write assembly code to load the value from address 100, add the constant 5, and store the result in address 101.
🔍 Worked example — Standard
A program contains the following instructions: \texttt{LDD 20}, \texttt{ADD 30}, \texttt{STO 40}. If the value at address 20 is 15 and the value at address 30 is 10, what is the value stored at address 40?
🔍 Worked example — Exam-style
Trace the following assembly code and determine the final value in the Accumulator (ACC). Assume address 50 contains 100 and address 51 contains 200. \texttt{LDD 50} \\ \texttt{ADD 51} \\ \texttt{ADD #10}
⚠️ Common errors
Common mistakes
Practice
Answers: (1) IX: holds a value added to an address for indexed addressing; status register: holds flags such as carry, overflow, zero and negative set by operations. (2) MAR ← [PC]; PC ← [PC] + 1; MDR ← [[MAR]]; CIR ← [MDR]. (3) Labels can be used before they are defined (forward references), so the first pass builds the symbol table and the second pass replaces labels with addresses. (4) (a) 120; (b) 9; (c) 31; (d) 80. (5) 01110001. (6) OR B00001000.